Rohde & Schwarz SML01 - Overview of Status Registers

Status Reporting System R&S®SML / R&S®SMV03
1090.3123.12 E-6 5.18
Overview of Status Registers
SRE
STB
STATus:OPERation-Register
PPE
IST flag
(Response to parallel poll)
& = logical AND
= logical OR
of all bits
ESE ESR
Error Queue
Output buffer
SRQ
RQS/MSS
ESB
MAV
Power on
User Request
Command Error
Execution Error
Device Dependent Error
Query Error
Request Control
Operation Complete
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
-&-
-&-
-&-
-&-
-&-
-&-
-&-
-&-
-&-
-&-
-&-
-&-
-&-
-&-
-&-
-&-
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
-&-
-&-
-&-
-&-
-&-
-&-
-&-
-&-
-&-
-&-
-&-
-&-
-&-
-&-
-&-
-&-
-&-
-&-
-&-
-&-
-&-
-&-
-&-
-&-
-&-
-&-
-&-
-&-
-&-
-&-
-&-
-&-
-&-
-&-
-&-
7
6
5
4
3
2
1
0
STATus:QUEStionable-Register
not implemented
not implemented
Fig. 5-4 Overview of status registers