EasyManua.ls Logo

Rohde & Schwarz SMW-K144 - Page 102

Rohde & Schwarz SMW-K144
285 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
5G New Radio Configuration and Settings
R&S
®
SMW-K144
102User Manual 1178.8013.02 ─ 06
"All Contiguous
RBs"
The same precoding is used across all REG within the set of contigu-
ous resource blocks in the CORESET; corresponds to
precoderGranularity = allContiguousRBs.
Remote command:
[:SOURce<hw>]:BB:NR5G:SCHed:CELL<ch0>:SUBF<st0>:USER<dir0>:
BWPart<gr0>:ALLoc<user0>:CS:PREGran on page 233
CORESET ID
Sets the CORESET ID.
Set "CORESET ID = 0" to simulate CORESET 0 (controlResourceSetZero). If
CORESET 0 is used, the reference point changes and is according to TS 38.211 the
subcarrier 0 of the lowest-numbered resource block in the CORESET.
For "CORESET ID 1", the reference point is subcarrier 0 in common resource block
0.
Remote command:
[:SOURce<hw>]:BB:NR5G:SCHed:CELL<ch0>:SUBF<st0>:USER<dir0>:
BWPart<gr0>:ALLoc<user0>:CS:ID on page 233
Use DMRS Scrambling ID
Defines the parameter used to calculate the PUCCH scrambling sequence:
If disabled, the Cell ID is used.
If enabled, the demodulation reference signal DMRS ID is used.
Remote command:
[:SOURce<hw>]:BB:NR5G:SCHed:CELL<ch0>:SUBF<st0>:USER<dir0>:
BWPart<gr0>:ALLoc<user0>:CS:DMRS:SCRam:STATe on page 233
ID
For Use DMRS Scrambling ID > "On", sets the value of the higher-level parameter
PDCCH-DMRS-Scrambling-ID, according to TS 38.211.
This DMRS scrambling ID is used to calculate the PDCCH scrambling sequence
instead of Cell ID.
Remote command:
[:SOURce<hw>]:BB:NR5G:SCHed:CELL<ch0>:SUBF<st0>:USER<dir0>:
BWPart<gr0>:ALLoc<user0>:CS:DMRS:SCRam:ID on page 234
Interleaving State
If enabled, the CCE-to-REG mapping is interleaved.
This parameter corresponds to the higher-level parameter
CORESET-CCE-REG-mapping-type (TS 38.211).
See "CORESET" on page 100.
Remote command:
[:SOURce<hw>]:BB:NR5G:SCHed:CELL<ch0>:SUBF<st0>:USER<dir0>:
BWPart<gr0>:ALLoc<user0>:CS:IL:STATe on page 234
CORESET Settings

Table of Contents

Related product manuals