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STS_UP 1: Status direction up.
STS_DO2 The DO2 status bit indicates the status of digital output DO2.
STS_DO1 The DO1 status bit indicates the status of digital output DO1.
STS_DI The DI status bit indicates the status of digital input DI.
STS_GATE 1: Counting operation running.
STS_ND Status zero crossing
Set on crossing zero in counter range when counting without main direction.
This bit must be reset by the RES_STS control bit.
STS_UFLW Status lower count limit
Set if the count value goes below the lower count limit.
This bit must be reset by the RES_STS control bit.
STS_OFLW Status upper count limit
Set if the counter goes above the upper count limit.
This bit must be reset by the RES_STS control bit.
STS_CMP2 Status comparator 2
This status bit indicates a comparison result for comparator 2 if:
the output DO2 is released with CTRL_DO2 = 1 and a comparison is run via MODE_DO2 =
01, 10 or 11:
Otherwise STS_CMP2 simply indicates that the output is or was set.
STS_CMP2 is also set if DO1 SET_DO2 = 1 when the output is not released.
This bit must be reset by the RES_STS control bit.
STS_CMP1 Status comparator 1
This status bit indicates a comparison result for comparator 2 if:
the output DO1 is released with CTRL_DO1 = 1 and a comparison is run via MODE_DO1 =
01, 10 or 11.
Otherwise STS_CMP2 simply indicates that the output is or was set.
STS_CMP2 is also set if DO1 SET_DO2 = 1 when the output is not released.
This bit must be reset by the RES_STS control bit.
STS_SYN Status synchronization
After synchronization is successfully completed the STS_SYN status bit is set. This bit must
be reset by the RES_STS control bit. This bit must be reset by the RES_STS control bit.
Bit Description
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