ADCMT 6253 - Device Event Status Register (DESR); Error Event Register (ERR); Standard Event Status Register (SESR)

6253 DC Voltage Current Source/Monitor Operation Manual
5.6 Status Register Structure
5-14
5.6 Status Register Structure
The 6253 has a hierarchical status register structure that conforms to the IEEE standard 488.2-1987 and can
send various statuses of itself to the controller. The following explains an operational model of the status
structure and allocation of events.
1. Status Register
The 6253 employs a status register model as defined by the IEEE standard 488.2-1987. A status register
consists of an Event Register and an Enable Register.
• Event Register
The Event Register latches and maintains the status for each event. (It may also hold changes.)
Once the register is set, it remains set until it is read out by a query or cleared by *CLS.
Data cannot be written into the Event Register.
• Enable Register
The Enable Register specifies for which bits in the Event Register a valid status summary should
be generated. The logical AND operation is executed between the Enable Register and the Event
Register, and the OR result is generated as a summary. The summary is written into the Status Byte
Register.
Data can be written into the enable register.
The 6253 has the following four types of status registers.
• Status Byte Register (STB)
• Standard Event Status Register (SESR)
• Device Event Status Register (DESR)
• Error Event Register (ERR)
Event
Register
Enable
Register
0
1
:
:
:
n-1
n
OR
Summary
&
&
&
&
0
1
:
:
:
n-1
n