Virtual Leased Line Services
7210 SAS M Services Guide Page 133
peak packet delay variation (PDV) expected in the network used by circuit emulation service. For
example, for a PDV of ±5 ms, configure the jitter buffer to be at least 10 ms.
Note: The jitter buffer setting and payload size (packetization delay) interact such that it may be
necessary for the operating system to adjust the jitter buffer setting in order to ensure no loss of
packets. Thus, the configured jitter buffer value may not be the value used by the system. Use the
show>service>id service_id>all command to show the effective PDVT (packet delay variation
tolerance).
The following values are the default jitter buffer times for structured circuits, where N is the
number of timeslots:
• For N = 1, the default is 32 ms
•For 2 ≤ N ≤ 4, the default is 16 ms
•For 5 ≤ N ≤ 15, the default is 8 ms
•For N ≥ 16, the default is 5 ms
Jitter buffer overrun and under run counters are available for statistics and can raise an alarm
(optional) while the circuit is operational. For overruns, excess packets are discarded and counted.
For under runs, an all-ones pattern is sent for unstructured circuits and an all-ones or a user-
defined pattern is sent for structured circuits (based on configuration).
The circuit status and statistics can be displayed using the appropriate show command.
RTP Header
For all circuit emulation channels, the RTP in the header is optional (as per RFC 5086).
When enabled for absolute mode operation, an RTP header is inserted in the MPLS frame upon
transmit. Absolute mode is defined in RFC 5086 and means that the ingress PE will set
timestamps using the clock recovered from the incoming TDM circuit. When an MPLS frame is
received, the RTP header is ignored. The RTP header mode is for TDM pseudowire
interoperability purposes only and should be enabled when the other device requires an RTP
header.
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