5 Serial Ports
5 – 20
B2 B1 B0
SCLK
OUTPUT
TFS
DT
TFS
INPUT
B3 B2 B1 B0B3 B3 B2
B2 B1 B0
SCLK
OUTPUT
TFS
DT
TFS
INPUT
B3 B2 B1 B0B3
continuous receiving in the alternate framing mode. In these four figures,
both the input timing requirement for an externally generated frame sync
and the output timing characteristic of an internally generated frame sync
are shown. Note that the output meets the input timing requirement; thus,
on processors with two SPORTs, one SPORT could provide RFS for the
other.
SPORT Control Register:
Internal Frame Sync 0XXX 1
01X 0XXX 0011
External Frame Sync 0XXX 100X 0XXX 0011
Both Internal Framing Option and External Framing Option Shown
Figure 5.16 SPORT Transmit, Normal Framing
SPORT Control Register:
Internal Frame Sync 0XXX 101X 0XXX 0011
External Frame Sync 0XXX 100X 0XXX 0011
Both Internal Framing Option and External Framing Option Shown
Figure 5.17 SPORT Continuous Transmit, Normal Framing