Analog Devices adsp-2100 - Page 128

5Serial Ports
5 – 29
last value has been loaded into the transmit shift register. A receive
interrupt will be generated once the rx_buffer has been completely filled.
.MODULE/RAM code_to_init_AB_SPORT1;
{—— Initialization code for autobuffer ——}
.VAR/DM/CIRC tx_buffer[10];
.VAR/DM/CIRC rx_buffer[10];
.ENTRY sport1_inits;
{set up I,M, and L registers}
sport1_inits: I0 = ^tx_buffer; {I0 contains address of
tx_buffer}
M0 = 1; {fill every location}
L0 = %tx_buffer; {L0 set to length of tx_buffer}
I1 = ^rx_buffer; {I1 points to rx_buffer}
L1 = %rx_buffer; {L1 set to length of rx_buffer}
{set up SPORT1 for autobuffering}
AX0 = 0x0013; {TX uses I0, M0; RX uses I1, M0}
DM(0x3FEF) = AX0; {autobuffering enabled}
{set up SPORT1 for 8 kHz sampling and 2.048 MHz SCLK}
AX0 = 255; {set RFSDIV to 255 for 8 kHz}
DM(0x3FF0) = AX0;
AX0 = 2; {set SCLKDIV to 2 for 2.048 MHz SCLK}
DM(0x3FF5) = AX0;
{set up SPORT1 for normal required framing, internal SCLK}
{internal generated framing}
AX0 = 0x6B27; {normal framing, 8 bit mu-law}
DM(0x3FF2) = AX0; {internal clock, framing}
{set up interrupts}
IFC = 6; {clear any extraneous SPORT
interrupts}
ICNTL = 0; {interrupt nesting disabled}