System Interface9
9 – 10
FO (SPORT1 only) Flag Out value undefined unchanged
CLKODIS CLKOUT disable 0 unchanged
BIASRND MAC biased rounding 0 unchanged
Host Interface Port Registers (memory-mapped)
HDR0-5 HIP data registers undefined used during HIP reboot
HSR6 HIP status register 0x0000 used during HIP reboot
HSR7 HIP status register 0x0080 unchanged
HMASK HIP interrupt enables 0 unchanged
Table 9.5 ADSP-2171 State After Reset Or Software Reboot
Control Field Description Reset Reboot
Bus Exchange Register
PX PX register undefined undefined
Status Registers
IMASK Interrupt service enables 0 0
ASTAT Arithmetic status 0 0
MSTAT Mode status 0 unchanged
SSTAT Stack status 0x55 0x55
ICNTL Interrupt control undefined unchanged
IFC Interrupt force/clear 0 0
Control Registers (memory-mapped)
BWAIT Boot memory wait states 3 unchanged
BPAGE Boot page 0 unchanged
SPORT1 configure Configuration 1 unchanged
SPE0 SPORT0 enable 0 unchanged
SPE1 SPORT1 enable 0 unchanged
DWAIT0–4 Data memory wait states 7 unchanged
PWAIT Program memory wait 7 unchanged
TCOUNT Timer count register undefined operates during reboot
TPERIOD Timer period register undefined unchanged
TSCALE Timer scale register undefined unchanged
PDFORCE Powerdown force 0 unchanged
PUCR Powerup context reset 0 unchanged
XTALDIS XTAL pindrive disable 0 unchanged
during powerdown
XTALDELAY Delay startup from powerdown 0 unchanged
(4096 cycles)
Table 9.6 ADSP-2181 State After Reset Or Software Reboot (cont. on next page)
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