10 Memory Interface
10 – 8
When the MMAP and BMODE pins both are set to 1, the ADSP-2172 (or
ADSP-21msp59) will operate in standalone ROM execution mode. When
MMAP=1 and BMODE=1, the ROM is automatically enabled and
execution begins from program memory location 0x0800 at the start of
ROM. This lets an embedded design operate without external memory
components. To operate in this mode, the ROM-coded program must copy
an interrupt vector table to the appropriate locations in program memory
RAM. In this mode, the ROMENABLE bit defaults to 1 during reset.
Table 10.1 summarizes the booting and startup execution modes for the
ADSP-2172 and ADSP-21msp59.
BMODE = 0 BMODE = 1
MMAP = 0 Boot from EPROM, Boot from HIP, then
then execution starts execution starts at
at internal RAM internal RAM location
location 0x0000 0x0000
MMAP = 1 No booting, execution Standalone mode,
starts at external memory execution starts at
location 0x0000 internal ROM location
0x0800
Table 10.1 Booting Mode for ADSP-2172, ADSP-21msp59
The ADSP-216x processors are memory-variant versions of the ADSP-2101
and ADSP-2103 that contain factory-programmed on-chip ROM program
memory. The ADSP-2161, ADSP-2163, and ADSP-2165 are 5.0V supply
processors based on the ADSP-2101. The ADSP-2162, ADSP-2164, and
ADSP-2166 are 3.3V supply processors based on the ADSP-2103. These
devices offer different amounts of on-chip memory for program and data
storage, as shown in Table 10.2.
Feature 2161 2162 2163 2164 2165 2166
Data Memory (RAM)
1
⁄2K
1
⁄2K
1
⁄2K
1
⁄2K4K 4K
Program Memory (ROM) 8K 8K 4K 4K 12K 12K
Program Memory (RAM) ––––1K1K
Table 10.2 ADSP-216x ROM-Programmed Processors
Figures 10.8, 10.9, and 10.10 show the program memory maps for the
ADSP-2161/62, ADSP-2163/64, and ADSP-2165/66, respectively.
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