10Memory Interface
10 – 31
includes four fields for the ADSP-2181’s I/O memory space.
The Data Memory overlay select (DMOVLAY) register lets you choose a
memory overlay to map from address DM(0x0000) to address DM(0x1FFF).
The DMOVLAY register is unique to the ADSP-2181. The memory mapped
to this space and corresponding DMOVLAY contents are shown in Figure
10.29. Table 10.4 shows how DMOVLAY relates to memory addressing
(address line A13).
DMOVLAY Memory A13 A12:0
0 Internal — —
1 External overlay 1 0 13 LSBs of address between
0x0000 and 0x1FFF
2 External overlay 2 1 13 LSBs of address between
0x0000 and 0x1FFF
Table 10.4 DMOVLAY and Data Memory Overlay Addressing
The following example instructions demonstrate how to use the DMOVLAY
register:
DMOVLAY=DM(0x1234); {type 3 instruction, DMOVLAY is loaded
}
{ with the contents of address
DM(0x1234)}
DMOVLAY=2; {type 7 instruction, DMOVLAY is loaded }
{ with the value 2. }
DMOVLAY=AX0; {DMOVLAY is loaded from AX0 register.}
AX0=DMOVLAY; {AX0 is loaded from DMOVLAY register.}
For an example memory design that provides full external program and
data memory overlays for an ADSP-2181 processor, see the previous section
“Program Memory Interface.”
Two control lines indicate the direction of external transfers. Memory read
(
RD
) is active low signaling a read and memory write (
WR
) is active low for
a write operation. Typically, you would connect
DMS
to
CE
(Chip Enable),
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