Figure 4: QFX-EM-4Q Expansion Module
•
EX4600-EM-8F, which provides eight additional10-Gigabit Ethernet Enhanced Small
Form-Factor Pluggable (SFP+) ports. See Figure 5 on page 7.
Figure 5: EX4600-EM-8F Expansion Module
NOTE: The EX4600-EM-8F is not supported on the QFX5100-24Q
running in QFabric systems.
The QFX5100-24Q is configured for the QFX-EM-4Q by default, but any combination
of the two modules is supported. Expansion modules can be hot-inserted or
hot-removed. However, when an EX4600-EM-8F is inserted instead of the default
QFX-EM-4Q, the new configuration causes the interfaces to temporarily go down.
Likewise, when an EX4600-EM-8F is running on the QFX5100-24Q and it is swapped
with a QFX-EM-4Q, the interfaces temporarily go down, which can cause a short
disruption in traffic.
•
QFX5100-24Q-AA
As shown in Figure 6 on page 8, the QFX5100-24Q-AA is a 1 U, top-of-rack, 40-Gigabit
Ethernet QSFP+ switch with 24 high-density QSFP+ ports. Each QSFP+ port can be
configured to support 40-Gigabit Ethernet or as a set of 4 independent 10-Gigabit
Ethernet ports. The QFX5100-24Q-AA can also be configured to support twenty-four
40-Gigabit Ethernet interfaces or ninety-six 10-Gigabit Ethernet interfaces using
breakout cables (channelization mode) with 1280 Gbps output. The switch can be
ordered with either ports-to-FRUs or FRUs-to-ports airflow and with AC or DC power
supplies. The QFX5100-24Q switch provides full duplex throughput of 2.56 Tbps.
The QFX5100-24Q-AA module baycan accommodatea single Packet Flow Accelerator
(PFA) double-wide expansion module (QFX-PFA-4Q) or two single-wide optional
expansion modules (two or one each of QFX-EM-4Q and EX4600-EM-8F). The
QFX-PFA-4Q, which features a high-performance field-programmable gate array
(FPGA), provides four additional QSFP+ ports to the chassis. Each QFX-EM-4Q adds
four QSFP+ ports to the chassis and each EX4600-EM-8F adds eight 10-Gigabit SFP+
ports to the chassis. The QFX-EM-4Q ports can also be configured as either access
7Copyright © 2016, Juniper Networks, Inc.
Chapter 1: System Overview
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