System Integration Module (SIM)
Technical Data MC68HC908AB32 — Rev. 1.0
120 System Integration Module (SIM) MOTOROLA
Figure 8-10. Interrupt Processing
8.6.1.1 Hardware Interrupts
Processing of a hardware interrupt begins after completion of the current
instruction. When the instruction is complete, the SIM checks all pending
hardware interrupts. If interrupts are not masked (I-bit clear in the
condition code register), and if the corresponding interrupt enable bit is
set, the SIM proceeds with interrupt processing; otherwise, the next
instruction is fetched and executed.
NO
NO
NO
YES
NO
NO
YES
YES
AS MANY INTERRUPTS
I BIT SET?
FROM RESET
BREAK
I-BIT SET?
IRQ
INTERRUPT?
SWI
INSTRUCTION?
RTI
INSTRUCTION?
FETCH NEXT
INSTRUCTION
UNSTACK CPU REGISTERS
STACK CPU REGISTERS
SET I-BIT
LOAD PC WITH INTERRUPT VECTOR
EXECUTE INSTRUCTION
YES
YES
AS EXIST ON CHIP
INTERRUPT?
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