Motorola MC68HC908AB32 - IO Registers; TIMA Status and Control Register

Timer Interface Module A (TIMA)
Technical Data MC68HC908AB32 — Rev. 1.0
184 Timer Interface Module A (TIMA) MOTOROLA
11.10 I/O Registers
The following I/O registers control and monitor operation of the TIMA:
• TIMA status and control register (TASC)
• TIMA counter registers (TACNTH:TACNTL)
• TIMA counter modulo registers (TAMODH:TAMODL)
• TIMA channel status and control registers (TASC0, TASC1,
TASC2, and TASC3)
• TIMA channel registers (TACH0H:TACH0L, TACH1H:TACH1L,
TACH2H:TACH2L, and TACH3H:TACH3L)
11.10.1 TIMA Status and Control Register
The TIMA status and control register does the following:
• Enables TIMA overflow interrupts
• Flags TIMA overflows
• Stops the TIMA counter
• Resets the TIMA counter
• Prescales the TIMA counter clock
Address: $0020
Bit 7 654321Bit 0
Read: TOF
TOIE TSTOP
00
PS2 PS1 PS0
Write: 0 TRST
Reset: 00100000
= Unimplemented
Figure 11-4. TIMA Status and Control Register (TASC)