Motorola MC68HC908AB32 - IO Registers; TIMB Status and Control Register

Timer Interface Module B (TIMB)
Technical Data MC68HC908AB32 — Rev. 1.0
210 Timer Interface Module B (TIMB) MOTOROLA
12.10 I/O Registers
The following I/O registers control and monitor operation of the TIMB:
• TIMB status and control register (TBSC)
• TIMB counter registers (TBCNTH:TBCNTL)
• TIMB counter modulo registers (TBMODH:TBMODL)
• TIMB channel status and control registers (TBSC0, TBSC1,
TBSC2, and TBSC3)
• TIMB channel registers (TBCH0H:TBCH0L, TBCH1H:TBCH1L,
TBCH2H:TBCH2L, and TBCH3H:TBCH3L)
12.10.1 TIMB Status and Control Register
The TIMB status and control register does the following:
• Enables TIMB overflow interrupts
• Flags TIMB overflows
• Stops the TIMB counter
• Resets the TIMB counter
• Prescales the TIMB counter clock
Address: $0040
Bit 7 654321Bit 0
Read: TOF
TOIE TSTOP
00
PS2 PS1 PS0
Write: 0 TRST
Reset: 00100000
= Unimplemented
Figure 12-4. TIMB Status and Control Register (TBSC)