Timer Interface Module B (TIMB)
Technical Data MC68HC908AB32 — Rev. 1.0
214 Timer Interface Module B (TIMB) MOTOROLA
12.10.4 TIMB Channel Status and Control Registers
Each of the TIMB channel status and control registers does the
following:
• Flags input captures and output compares
• Enables input capture and output compare interrupts
• Selects input capture, output compare, or PWM operation
• Selects high, low, or toggling output on output compare
• Selects rising edge, falling edge, or any edge as the active input
capture trigger
• Selects output toggling on TIMB overflow
• Selects 100% PWM duty cycle
• Selects buffered or unbuffered output compare/PWM operation
Address: $0045
Bit 7 654321Bit 0
Read: CH0F
CH0IE MS0B MS0A ELS0B ELS0A TOV0 CH0MAX
Write: 0
Reset: 00000000
Figure 12-9. TIMB Channel 0 Status and Control Register (TBSC0)
Address: $0048
Bit 7 654321Bit 0
Read: CH1F
CH1IE
0
MS1A ELS1B ELS1A TOV1 CH1MAX
Write: 0
Reset: 00000000
Figure 12-10. TIMB Channel 1 Status and Control Register (TBSC1)