Timer Interface Module A (TIMA)
Functional Description
MC68HC908AB32 — Rev. 1.0 Technical Data
MOTOROLA Timer Interface Module A (TIMA) 173
Addr. Register Name Bit 7 654321Bit 0
$0020
Timer A Status and
Control Register
(TASC)
Read: TOF
TOIE TSTOP
00
PS2 PS1 PS0
Write: 0 TRST
Reset: 00100000
$0022
Timer A Counter
Register High
(TACNTH)
Read: Bit 15 14 13 12 11 10 9 Bit 8
Write:
Reset: 00000000
$0023
Timer A Counter
Register Low
(TACNTL)
Read: Bit 7 654321Bit 0
Write:
Reset: 00000000
$0024
Timer A Counter Modulo
Register High
(TAMODH)
Read:
Bit 15 14 13 12 11 10 9 Bit 8
Write:
Reset: 11111111
$0025
Timer A Counter Modulo
Register Low
(TAMODL)
Read:
Bit 7 654321Bit 0
Write:
Reset: 11111111
$0026
Timer A Channel 0 Status
and Control Register
(TASC0)
Read: CH0F
CH0IE MS0B MS0A ELS0B ELS0A TOV0 CH0MAX
Write: 0
Reset: 00000000
$0027
Timer A Channel 0
Register High
(TACH0H)
Read:
Bit 15 14 13 12 11 10 9 Bit 8
Write:
Reset: Indeterminate after reset
$0028
Timer A Channel 0
Register Low
(TACH0L)
Read:
Bit 7 654321Bit 0
Write:
Reset: Indeterminate after reset
$0029
Timer A Channel 1 Status
and Control Register
(TASC1)
Read: CH1F
CH1IE
0
MS1A ELS1B ELS1A TOV1 CH1MAX
Write: 0
Reset: 00000000
$002A
Timer A Channel 1
Register High
(TACH1H)
Read:
Bit 15 14 13 12 11 10 9 Bit 8
Write:
Reset: Indeterminate after reset
= Unimplemented
Figure 11-2. TIMA I/O Register Summary (Sheet 1 of 2)