Motorola MC68HC908AB32 User Manual

Input/Output (I/O) Ports
Technical Data MC68HC908AB32 — Rev. 1.0
324 Input/Output (I/O) Ports MOTOROLA
17.6.2 Data Direction Register D (DDRD)
Data direction register D determines whether each port D pin is an input
or an output. Writing a logic 1 to a DDRD bit enables the output buffer
for the corresponding port D pin; a logic 0 disables the output buffer.
DDRD[7:0] — Data Direction Register D Bits
These read/write bits control port D data direction. Reset clears
DDRD[7:0], configuring all port D pins as inputs.
1 = Corresponding port D pin configured as output
0 = Corresponding port D pin configured as input
NOTE: Avoid glitches on port D pins by writing to the port D data register before
changing data direction register D bits from 0 to 1. Figure 17-13 shows
the port D I/O logic.
Figure 17-13. Port D I/O Circuit
Address: $0007
Bit 7 654321Bit 0
Read:
DDRD7 DDRD6 DDRD5 DDRD4 DDRD3 DDRD2 DDRD1 DDRD0
Write:
Reset: 0 0000000
Figure 17-12. Data Direction Register D (DDRD)
READ DDRD ($0007)
WRITE DDRD ($0007)
RESET
WRITE PTD ($0003)
READ PTD ($0003)
PTDx
DDRDx
PTDx
INTERNAL DATA BUS
PTDPUEx
PTD6 to TACLK of TIMA
PTD4 to TBCLK of TIMB
V
DD

Motorola MC68HC908AB32 Specifications

General

Brand	Motorola
Model	MC68HC908AB32
Category	Controller
Language	English