Break Module (BRK)
Technical Data MC68HC908AB32
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Rev. 1.0
370
Break Module (BRK) MOTOROLA
BRKA — Break Active Bit
This read/write status and control bit is set when a break address
match occurs. Writing a logic 1 to BRKA generates a break interrupt.
Clear BRKA by writing a logic 0 to it before exiting the break routine.
Reset clears the BRKA bit.
1 = (When read) Break address match
0 = (When read) No break address match
22.6.2 Break Address Registers
The break address registers (BRKH and BRKL) contain the high and low
bytes of the desired breakpoint address. Reset clears the break address
registers.
22.6.3 SIM Break Status Register
The SIM break status register (SBSR) contains a flag to indicate that a
break caused an exit from wait mode. The flag is useful in applications
requiring a return to wait mode after exiting from a break interrupt.
Address: $FE0C
Bit 7 654321Bit 0
Read:
Bit 15 14 13 12 11 10 9 Bit 8
Write:
Reset: 00000000
Figure 22-4. Break Address Register High (BRKH)
Address: $FE0D
Bit 7 654321Bit 0
Read:
Bit 7 654321Bit 0
Write:
Reset: 00000000
Figure 22-5. Break Address Register Low (BRKL)