System Integration Module (SIM)
Technical Data MC68HC908AB32 — Rev. 1.0
128 System Integration Module (SIM) MOTOROLA
8.8.2 SIM Reset Status Register
This register contains six flags that show the source of the last reset. The
SIM reset status register can be cleared by reading it. A power-on reset
sets the POR bit and clears all other bits in the register.
POR — Power-On Reset Bit
1 = Last reset caused by POR circuit
0 = Read of SRSR
;
;
;
This code works if the H register has been pushed onto the stack in the break
service routine software. This code should be executed at the end of the
break service routine software.
HIBYTE EQU 5
LOBYTE EQU 6
; If not SBSW, do RTI
BRCLR SBSW,SBSR, RETURN ;
;
See if STOP or WAIT mode was exited by
break.
TST LOBYTE,SP ; If RETURNLO is not 0,
BNE DOLO ; then just decrement low byte.
DEC HIBYTE,SP ; Else deal with high byte, too.
DOLO DEC LOBYTE,SP ; Point to STOP/WAIT opcode.
RETURN PULH
RTI
; Restore H register.
Address: $FE01
Bit 7 654321Bit 0
Read: POR PIN COP ILOP ILAD 0 LVI 0
Write:
Reset: 10000000
= Unimplemented
Figure 8-18. SIM Reset Status Register (SRSR)