List of Figures
MC68HC908AB32 — Rev. 1.0 Technical Data
MOTOROLA List of Figures 23
Figure Title Page
11-2 TIMA I/O Register Summary. . . . . . . . . . . . . . . . . . . . . . . . . .173
11-3 PWM Period and Pulse Width . . . . . . . . . . . . . . . . . . . . . . . .177
11-4 TIMA Status and Control Register (TASC). . . . . . . . . . . . . . .184
11-5 TIMA Counter Register High (TACNTH). . . . . . . . . . . . . . . . .186
11-6 TIMA Counter Register Low (TACNTL) . . . . . . . . . . . . . . . . .187
11-7 TIMA Counter Modulo Register High (TAMODH). . . . . . . . . .187
11-8 TIMA Counter Modulo Register Low (TAMODL) . . . . . . . . . .187
11-9 TIMA Channel 0 Status and Control Register (TASC0) . . . . .188
11-10 TIMA Channel 1 Status and Control Register (TASC1) . . . . .188
11-11 TIMA Channel 2 Status and Control Register (TASC2) . . . . .189
11-12 TIMA Channel 3 Status and Control Register (TASC3) . . . . .189
11-13.CHxMAX Latency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .192
11-14 TIMA Channel 0 Register High (TACH0H) . . . . . . . . . . . . . . .192
11-15 TIMA Channel 0 Register Low (TACH0L). . . . . . . . . . . . . . . .192
11-16 TIMA Channel 1 Register High (TACH1H) . . . . . . . . . . . . . . .193
11-17 TIMA Channel 1 Register Low (TACH1L). . . . . . . . . . . . . . . .193
11-18 TIMA Channel 2 Register High (TACH2H) . . . . . . . . . . . . . . .193
11-19 TIMA Channel 2 Register Low (TACH2L). . . . . . . . . . . . . . . .193
11-20 TIMA Channel 3 Register High (TACH3H) . . . . . . . . . . . . . . .194
11-21 TIMA Channel 3 Register Low (TACH3L). . . . . . . . . . . . . . . .194
12-1 TIMB Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .198
12-2 TIMB I/O Register Summary. . . . . . . . . . . . . . . . . . . . . . . . . .199
12-3 PWM Period and Pulse Width . . . . . . . . . . . . . . . . . . . . . . . .203
12-4 TIMB Status and Control Register (TBSC). . . . . . . . . . . . . . .210
12-5 TIMB Counter Register High (TBCNTH). . . . . . . . . . . . . . . . .212
12-6 TIMB Counter Register Low (TBCNTL) . . . . . . . . . . . . . . . . .213
12-7 TIMB Counter Modulo Register High (TBMODH). . . . . . . . . .213
12-8 TIMB Counter Modulo Register Low (TBMODL) . . . . . . . . . .213
12-9 TIMB Channel 0 Status and Control Register (TBSC0) . . . . .214
12-10 TIMB Channel 1 Status and Control Register (TBSC1) . . . . .214
12-11 TIMB Channel 2 Status and Control Register (TBSC2) . . . . .215
12-12 TIMB Channel 3 Status and Control Register (TBSC3) . . . . .215
12-13.CHxMAX Latency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .218
12-14 TIMB Channel 0 Register High (TBCH0H) . . . . . . . . . . . . . . .218
12-15 TIMB Channel 0 Register Low (TBCH0L). . . . . . . . . . . . . . . .218
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