Motorola MC68HC908AB32 - Page 53

Memory Map
Input/Output (I/O) Section
MC68HC908AB32 — Rev. 1.0 Technical Data
MOTOROLA Memory Map 53
$FE00
SIM Break Status Register
(SBSR)
Read:
RRRRRR
SBSW
R
Write: Note
Reset: 00000000
Note: Writing a logic 0 clears SBSW.
$FE01
SIM Reset Status Register
(SRSR)
Read: POR PIN COP ILOP ILAD 0 LVI 0
Write:
POR: 10000000
$FE02 Reserved
Read:
RRRRRRRR
Write:
Reset: 00000000
$FE03
SIM Break Flag Control
Register
(SBFCR)
Read:
BCFE RRRRRRR
Write:
Reset: 0
$FE04 Reserved
Read:
RRRRRRRR
Write:
Reset:
$FE05 Reserved
Read:
RRRRRRRR
Write:
Reset:
$FE06 Reserved
Read:
RRRRRRRR
Write:
Reset:
$FE07 Reserved
Read:
RRRRRRRR
Write:
Reset:
$FE08
FLASH Control Register
(FLCR)
Read: 0000
HVEN MASS ERASE PGM
Write:
Reset: 00000000
$FE09 Reserved
Read:
RRRRRRRR
Write:
Reset:
Addr. Register Name Bit 7 654321Bit 0
= Unimplemented R = Reserved
Figure 2-2. Control, Status, and Data Registers (Sheet 9 of 11)