NXP Semiconductors MPC5777C - Page 105

0
1
2
34
5
6
Rx FIFO Full
RXFnS.FnPI
7
= RXFnS.FnGI
0
1
2
34
5
6
Rx FIFO Overwrite
RXFnS.FnPI
7
= RXFnS.FnGI
element 0 overwritten
read Get Index + 2
(RXFnS.FnF = ‘1’)
(RXFnS.FnF = ‘1’)
Figure 3-56. Rx FIFO Overflow Handling
After reading from the Rx FIFO, the number of the last element read has to be written to
the Rx FIFO Acknowledge Index RXFnA[FnA]. This increments the get index to that
element number. In case the put index has not been incremented to this Rx FIFO element,
the Rx FIFO full condition is reset (RXFnS[FnF] = 0).
3.5.4.1.7 Dedicated Rx Buffers
The M_CAN supports up to 64 dedicated Rx Buffers. The start address of the dedicated
Rx Buffer section is configured via RXBC[RBSA].
For each Rx Buffer a Standard or Extended Message ID Filter Element with SFEC /
EFEC = 111 and SFID2 / EFID2[10:9] = 00 has to be configured.
After a received message has been accepted by a filter element, the message is stored into
the Rx Buffer in the Message RAM referenced by the filter element. The format is the
same as for an Rx FIFO element. In addition the flag IR[DRX] (Message stored in
Dedicated Rx Buffer) in the interrupt register is set.
Table 3-60. Example Filter Configuration for Rx buffers
Filter Element SFID1[10:0] EFID1[28:0] SFID2[10:9] EFID2[10:9] SFID2[5:0] EFID2[5:0]
0 ID message 1 00 00 0000
1 ID message 2 00 00 0001
2 ID message 3 00 00 0010
Chapter 3 Modular CAN (M_CAN)
MPC5777C Reference Manual Addendum, Rev. 1, 12/2015
Freescale Semiconductor, Inc. 105