Omron SYSMAC CJ - REFERENCE MANUAL 08-2008 - Page 1325

1285
CS-series Instruction Execution Times and Number of Steps Section 4-1
4-1-2 Sequence Output Instructions
Note When a double-length operand is used, add 1 to the value shown in the length
column in the following table.
Instruction Mnemonic Code Length
(steps)
(See note.)
ON execution time (µs) Conditions
CPU-6@HCPU-4@HCPU-6@ CPU-4@
OUTPUT OUT --- 1 0.02 0.04 0.17 0.21 ---
!OUT --- 2 +21.37 +21.37 +21.37 +21.37 Increase for CS
Series
+49.3 +49.3 +49.3 +49.3 Increase for
C200H
OUTPUT NOT OUT NOT --- 1 0.02 0.04 0.17 0.21 ---
!OUT NOT --- 2 +21.37 +21.37 +21.37 +21.37 Increase for CS
Series
+49.3 +49.3 +49.3 +49.3 Increase for
C200H
KEEP KEEP 011 1 0.06 0.08 0.25 0.29 ---
DIFFERENTI-
ATE UP
DIFU 013 2 0.24 0.40 0.46 0.54 ---
DIFFERENTI-
ATE DOWN
DIFD 014 2 0.24 0.40 0.46 0.54 ---
SET SET --- 1 0.02 0.06 0.17 0.21 ---
!SET --- 2 +21.37 +21.37 +21.37 +21.37 Increase for CS
Series
+49.3 +49.3 +49.3 +49.3 Increase for
C200H
RESET RSET --- 1 0.02 0.06 0.17 0.21 Word specified
!RSET --- 2 +21.37 +21.37 +21.37 +21.37 Increase for CS
Series
+49.3 +49.3 +49.3 +49.3 Increase for
C200H
MULTIPLE
BIT SET
SETA 530 4 5.8 6.1 7.8 7.8 With 1-bit set
25.7 27.2 38.8 38.8 With 1,000-bit
set
MULTIPLE
BIT RESET
RSTA 531 4 5.7 6.1 7.8 7.8 With 1-bit reset
25.8 27.1 38.8 38.8 With 1,000-bit
reset
SINGLE BIT
SET
SETB 532 2 0.24 0.34 --- --- ---
!SETB 3 +21.44 +21.54 --- --- ---
SINGLE BIT
RESET
RSTB 534 2 0.24 0.34 --- --- ---
!RSTB 3 +21.44 +21.54 --- --- ---
SINGLE BIT
OUTPUT
OUTB 534 2 0.22 0.32 --- --- ---
!OUTB 3 +21.42 +21.52 --- --- ---