EasyManua.ls Logo

Schweitzer Engineering SEL-351P - External Inputs; BT - Received Block Trip Signal(S); Timer Settings; 67 P2 SD, 67 N2 SD, 67 G2 SD, 67 Q2 SD - Level 2 Short Delay

Default Icon
674 pages
Print Icon
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
Date Code 990215 Trip and Target Logic 5-25
SEL-351P Manual Técnico
External Inputs
See Optoisolated Inputs in Section 7: Inputs, Outputs, Timers, and Other Control Logic for
more information on optoisolated inputs.
BT – Received Block Trip Signal(s)
In two-terminal line DCB applications, a block trip signal is received from one
remote terminal.
One optoisolated input on the SEL-351P (e.g., input IN104) is driven by a communications
equipment receiver output (see
Figure SECTION 5: .15). Make SEL
OGIC
Control Equation
setting BT:
BT = IN104 (two-terminal line application)
In three-terminal line DCB applications, block trip signals are received from two
remote
terminals. Two optoisolated inputs on the SEL-351P (e.g., input IN104 and IN106) are driven by
communications equipment receiver outputs (see
Figure SECTION 5: .16). Make SEL
OGIC
Control Equation setting BT as follows:
BT = IN104 + IN106 (three-terminal line application)
SEL
OGIC
Control Equation setting BT is routed through a dropout timer (BTXD) in the DCB
logic in
Figure SECTION 5: .14. The timer output, Relay Word bit BTX, is routed to the trip
logic in
Figure SECTION 5: .1.
Timer Settings
See Section 9: Setting the SEL-351P Recloser Control for setting ranges.
Z3XPU – Zone (Level) 3 Reverse Pickup Time Delay
Current-reversal guard pickup timer – typically set at 1 cycle.
Z3XD – Zone (Level) 3 Reverse Dropout Extension
Current-reversal guard dropout timer – typically set at 5 cycles.
BTXD – Block Trip Receive Extension
Sets reset time of block trip received condition (BTX) after the reset of block trip input BT.
67P2SD, 67N2SD, 67G2SD, 67Q2SD – Level 2 Short Delay
Carrier coordination delays for the output of Level 2 overreaching overcurrent elements 67P2S,
67N2S, 67G2S, and 67Q2S, respectively – typically set at 1 cycle.

Table of Contents