Analog Devices adsp-2100

Contents
vi
5.8 CONFIGURATION EXAMPLE..................................................... 5–15
5.9 TIMING EXAMPLES ...................................................................... 5–16
5.10 COMPANDING AND DATA FORMAT ..................................... 5–23
5.10.1 Companding Operation Example ........................................... 5–24
5.10.2 Contention For Companding Hardware................................ 5–25
5.10.3 Companding Internal Data ...................................................... 5–25
5.11 AUTOBUFFERING.......................................................................... 5–26
5.11.1 Autobuffering Control Register............................................... 5–27
5.11.2 Autobuffering Example ............................................................ 5–28
5.12 MULTICHANNEL FUNCTION ................................................... 5–30
5.12.1 Multichannel Setup ................................................................... 5–30
5.12.2 Multichannel Operation ........................................................... 5–32
5.13 SPORT TIMING CONSIDERATIONS.......................................... 5–34
5.13.1 Companding Delay ................................................................... 5–34
5.13.2 Clock Synchronization Delay................................................... 5–34
5.13.2.1 Startup Timing ..................................................................... 5–34
5.13.3 Internally Generated Frame Sync Timing .............................. 5–34
5.13.4 Transmit Interrupt Timing ....................................................... 5–36
5.13.5 Receive Interrupt Timing.......................................................... 5–36
5.13.6 Interrupt And Autobuffer Synchronization .......................... 5–38
5.13.7 Instruction Completion Latencies ........................................... 5–38
5.13.8 Interrupt And Autobuffer Service Example .......................... 5–39
5.13.9 Receive Companding Latency ................................................. 5–40
5.13.10 Interrupts With Autobuffering Enabled ................................ 5–41
5.13.11 Unusual Complications ............................................................ 5–42
CHAPTER 6 TIMER
6.1 OVERVIEW ........................................................................................ 6–1
6.2 TIMER ARCHITECTURE................................................................. 6–1
6.3 RESOLUTION .................................................................................... 6–3
6.4 TIMER OPERATION ........................................................................ 6–3