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Delta VP3000 Series
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Chapter 7 Second Development PlatformVP3000
345
API Instruction code Operand Function
123 D EDIV P S
1
, S
2
, D
Binary floating-point number division
Type
Operand
Bit devices Word devices
16-bit instruction
- - - -
32-bit instruction (13 steps)
DEDIV
Continuous
execution
type
DEDIVP
Pulse
execution
type
Associated flag: none
X Y M K H KnX KnY KnM T C D
S
1
S
2
D
Caution for using operand
See the specification of each model for the scope of device’s usage.
Description
S
1
: Dividend
S
2
: Divisor
D: Quotient and remainder
The content of the register that S
1
designates divides by the content of the register that S
2
designates, and its quotient is stored in the register that D designates. This division is
performed in the form of binary floating-point numbers.
If S
1
or S
2
is a designated constant K or H, the instruction will convert the constant into a
binary floating-point value before the division.
Example
Example 1
When X1 = ON, the binary floating-point number (D1, D0) divides by the binary floating-point
number (D11, D10), and store the quotient to the register that (D21, D20) designate.
X1
DEDIV
D0 D10 D20
Example 2
When X2 = ON, the binary floating-point numbers (D1, D0) divides by K1234 (convert to binary
floating-point number automatically), and stores the result in (D11, D10).
X2
DEDIV
D0 K1234 D10

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