(
(
f
(
Op Code Loop
Test
-
CMD
2
C
OP
CODE
EXEC
-
This routine tests all controller microinstructions.
Numerous IAR (instruction address register) hang points
localize specific failing processor operations and monitor
storage accesses at the
RDR
for
improper parity.
This test repeats until halted by the operator (if
accessed via DCP1). When accessed by the bring up
program,
it
is not repeated.
ROS
Read CRC Loop
Test
-
CMD
3
C
ROS
READ
EXEC
-
The
ROS
test checks
if
the machine can address and
fetch data from each
ROS
module relating
to
the
language (APL or BASIC)
of
the machine. While the test
runs, each byte
of
data in each
ROS
module is read and
CRC
sums are generated and compared. Compare
failures, end the test, and post
an
error on the display.
Parity errors from the
ROS
adapter are detected on the
bus
in
to
the control unit and cause a process check.
Before executing this routine, the
read/write
storage
must be set
to
zero at locations 0100 through 010D.
Refer
to
the
DCP1
alter function
for
the procedure. Exit
from
DCP1
diagnostic mode by pressing RESTART.
ROS
Address Loop
Test
-
CMD
4
C
ROS
ADR
EXEC
-
This test sends nonexecutable
ROS
addresses
to
the
ROS
adapter, reads back several halfwords
of
data,
and
then reads back the address
to
verify
that
it
advances
correctly. Send and read back continues until 12
different
ROS
addresses are used
for
the selected
language (BASIC
or
APL). This test loops until halted by
the operator (if called via DCP1). When called by the
bring up program,
it
does not loop.
Read/Write
Storage
Test
-
CMD
5
C
RAM
TEST
EXEC
-
This routine stores data in all locations
of
read/write
storage and then reads it all out and compares
it
one
address at a time.
It
then shifts the data one position
and loops on the test.
If
allowed
to
run, all
read/write
storage addresses are tested
for
each possible data
combination. The
test
runs until the operator stops
it
by
using the
CMD
and ATTN key combination. Either a
process check or a customer halt condition can occur.
RFLO
(register F in level
0)
(refer
to
Display Registers in
this section) contains the storage location that was
being addressed at the time
of
the failure. The
suspected
read/write
storage card that caused the
failure
can
be identified by using the following table:
0000
to
3FFF
K2,
K4 (read/write storage) cards
4000
to
7FFF
L2,
L4 (read/write storage) cards
8000
to
BFFF
M2,
M4
(read/write storage) cards
COOO
to
FFFF
N2, N4 (read/write storage) cards
The
read/write
storage cards
K2,
L2,
M2, and N2 are
the even addresses and card
K4,
L4,
M4, and N4 are
the odd addresses. Exit from
DCP1
diagnostic mode by
pressing RESTART.
5100 Diagnostics Overview 3·25
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