5486AdvTech.fm Draft Document for Review October 18, 2004
20 IBM Eserver i5 and iSeries System Handbook
Memory and CPU sharing, a dual clock, and dual service processors with failover
capability are examples of the full system design approach for high availability.
IBM designed the Eserver i5 system processor, caching mechanisms, memory
allocation methods, and the HSL-2/RIO-G adapters for performance and
availability. In addition, advanced error correction and low power consumption
circuitry is improved with thermal management.
Multiprocessor POWER5 technology-based servers have multiple autonomic
computing features for higher availability compared with single processor
servers. If a processor is running, but is experiencing a high rate of correctable
soft errors or is failing a periodic floating point self test, it can be
deconfigured
dynamically
. Its workload can be picked up automatically by the remaining
processor or processors without an IPL. If there is an unused Capacity Upgrade
on Demand processor or if one processor unit of unused capacity in a shared
processor pool is available, the deconfigured processor can be replaced
dynamically by the unused processor capacity to maintain the same level of
processor performance.
The future
For the future, Power Architecture microprocessors are being designed to keep
running through many hard processor failures. The processor state will be
maintained and switched to a hot standby processor. Reliability and availability
characteristics associated only with IBM Eserver zSeries® class machines will
be incorporated into the Eserver i5 systems.
Silicon On Insulator
In 2000, the iSeries led the industry by delivering the first server with the new
Silicon-On-Insulator technology. SOI represents a fundamental advance in the
way chips are built. The unique IBM SOI process alters the design of transistors,
essentially “turbo charging” them, so they run faster and use less power. For
example, a microprocessor designed to operate at a given speed can instead be
built using SOI technology to achieve higher speeds. At the same time, if
performance levels are held constant, SOI chips can require as little as one-third
the power of today's microchips.
“Power Architecture™ is more than just a technology, but rather a movement
for change. It’s time for architecture that enables innovation to flourish. It’s time
for Power Everywhere™.”
– Nick Donofrio, IBM Senior VP
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