102
(4)
When HOLD signal is input
DATA
POL.
P.C.
ON
HOLD
ON
ON
ON ON
ON
● At the time of HOLD signal input, output transistor for P.C. will be
OFF condition(Positive logic electrically).
However, as for P.C., OFF condition is made after one(1) shot of
operation is finished.
9−2−6.
Output condition
condition
voltage is fed externally
Yes ON L
No OFF H
Yes OFF H
No ON L