Panasonic MN101L Series

Chapter 3
Interrupts
III - 18 Overview
 Group interrupt control register Setup Procedure
Setup procedures of the group interrupt control register set by the software are as follow:
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When an interrupt occurs, the corresponding bit of PERInDT is set to "1" regardless of the
setting of PERInEN. Please clear it by referring to setup procedure.
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Setup Procedure Description
(1) Disable all maskable interrupts
PSW
bp6: MIE = 0
(1) Clear PSW.MIE to disable all maskable interrupts,
which is needed, especially when xICRis changed.
(2) Clear PERInDT (PERI0DT, PRI1DT) (2) Clear PERInDT by reading the value of PERInDT, and
setting the register to it. When operating the interrupts
that occurred before this setting, please don’t clear the
applicable bits.
(3) Set PERInEN (PERI0EN, PERI1EN) (3) Enable the interrupt occurrence.
(4) Set the interrupt level
PERInICR (PERI0ICR, PERI1ICR)
(4) Set the interrupt level by PERInICR.PERInLV1-0.
(5) Enable all maskable interrupts
PSW
bp6: MIE = 1
(5) Enable all maskable interrupts
(6) [Accept interrupt] (6) Read the value of PERInDT, and distinguish the
interrupt factor by software.
(7) Clear the interrupt request bits of
PERInDT (PERI0DT, PERI1DT)
(7) Clear the interrupt request bit by setting the applicable
bits to "1"