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Panasonic MN101L Series

Panasonic MN101L Series
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Chapter 13
Serial Interface
Overview XIII - 3
13.1.1 Functions
Table:13.1.3, Table:13.1.4, and Table:13.1.5 show the serial interface functions.
Table:13.1.3 Functions of Clock-Synchronous Communication
Table:13.1.4 Functions of UART Communication
SCIF0/SCIF1/SCIF2/SCIF3
Transfer clock SCIF0/SCIF1: Generated by dividing BRTMn output clock by 1, 8 or 16
SCIF2/SCIF3: Generated by dividing BRTMn output clock by 1
Duty of BRTM output clock 1:1
BRTM count clock
HCLK/2
a
(a = 0, 1, 2, 3, 4, 5, 6, 7, 8)
SCLK/2
b
(b = 0, 1, 2, 3, 4, 5, 6, 7, 8)
SYSCLK/2
c
(c = 0, 1, 2, 3, 4, 5, 6)
First transfer bit MSB-first or LSB-first
Clock polarity & phase selection
2/3/4-wire communication
Consecutive communication
Interrupt SCnTICR
SCIF0/SCIF1
Transfer clock Generated by dividing BRTMn output clock by 8 or 16
Duty of BRTM output clock 1:1 or 1:N
BRTM count clock
HCLK/2
a
(a = 0, 1, 2, 3, 4, 5, 6, 7, 8)
SCLK/2
b
(b = 0, 1, 2, 3, 4, 5, 6, 7, 8)
SYSCLK/2
c
(c = 0, 1, 2, 3, 4, 5, 6)
First transfer bit MSB-first or LSB-first
Number of transfer bit 7 or 8 bits
Number of Stop bit 1 or 2 bits
Parity bit 0 parity
1 parity
Odd parity
Even parity
Interrupt SCnTICR, SCnRICR

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