Panasonic MN101L Series

Chapter 10
General-Purpose Time Base/Free-Running Timer
Control Registers X - 7
10.2.4 Timer Mode Register
This is a readable/writable register that controls the timer 6 and the time base timer.
 Timer 6 Mode Register (TM6MD:0x03F7A)
bp 76543210
Bit name TM6CLRS TM6IR2 TM6IR1 TM6IR0 TM6CK3 TM6CK2 TM6CK1 TM6ICK0
At reset00000000
Access R/W R/W R/W R/W R/W R/W R/W R/W
bp Bit name Description
7 TM6CLRS
Timer 6 binary counter clear select
0: Enable the initialization of TM6BC when TM6OC is written.
1: Disable the initialization of TM6BC when TM6OC is written.
* When TM6CLRS = 0, PERI0IRQ1 is disabled. When TM6CLRS = 1, PERI0IRQ1
is enabled.
6 to 4 TM6IR2 to 0
Interrupt cycle of time base timer select
000: Time base selection clock × 1/2
7
001: Time base selection clock × 1/2
8
010: Time base selection clock × 1/2
9
011: Time base selection clock × 1/2
10
100: Time base selection clock × 1/2
12
101: Time base selection clock × 1/2
13
110: Time base selection clock × 1/2
14
111: Time base selection clock × 1/2
15
3 to 1
TM6CK3 to
1
Timer 6 clock source select
000: HCLK
001: SYSCLK
010: SCLK
011: Setting prohibited
100: Time base selection clock × 1/2
13
101: Setting prohibited
110: Time base selection clock × 1/2
7
111: Setting prohibited
0TM6CK0
Time base timer clock source select
0: HCLK
1: SCLK