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Panasonic MN101L Series

Panasonic MN101L Series
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Chapter 9
16-bit Timer
16-bit Standard PWM Output (with Continuously Variable Duty) IX - 31
9.6
16-bit Standard PWM Output
(with Continuously Variable Duty)
9.6.1 Operation
In the standard PWM output function, a PWM waveform with a given duty cycle can be generated and output
from TMnIO pin.
16-bit Standard PWM Output
A PWM waveform with a given duty cycle is generated by setting TMnOC1 to "High" period of the PWM duty.
And the period of the PWM is the time of the full count overflow of the 16-bit timer.
The PWM output pin is shown in Table:9.1.1.
Count Timing of Standard PWM Output (at Normal)
Figure:9.6.1 Count Timing of Standard PWM Output (at Normal)
As for PWM output waveform:
(A) PWM output is "High" while the binary counter counts up from "0x0000" to the setting value of the com-
pare register.
(B) PWM output changes to "Low" when the binary counter matches the setting value of the compare register,
then the binary counter continues counting up until it overflows.
(C) PWM output returns to "High" when the binary counter overflows.
N
N+1 N+2 FFFE
FFFF
Count
clock
TMnEN
bit
Compare
register 1
Binary
counter
0000 0001 N+
1
N-1
N
0000 0001 N-1
N
T
MnIO output
(
PWM output)
(A) (B)
(C)
PWM basic waveform (overflow time of the binary counter)
Count time:
(Compare registser 1 setting value + 1)

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