Panasonic MN101L Series

Chapter 2
CPU
Overview II - 5
2.1.6 Processor Status Word (PSW)
PSW is pushed onto the stack at interrupt occurrence and popped at returning from the interrupt service routine
automatically.
 Processor Status Word (PSW)
 Zero Detection (ZF)
ZF is set to "1", when all bits are "0" in the operation result. Otherwise, zero bit is set to "0".
 Carry Detection (CF)
CF is set to "1", when a carry from or a borrow to the MSB occurs. Carry bit is set to "0", when no carry or borrow
occurs.
 Negative Detection (NF)
NF is set to "1" when MSB is "1" and set to "0" when MSB is "0". Negative bit is used to handle a signed value.
 Overflow Detection (VF)
VF is set to "1", when the operation results overflow as a signed value. Otherwise, overflow bit is set to "0". Over-
flow bit is used to handle a signed value.
bp 76543210
Bit name BKD MIE IM1-0 VF NF CF ZF
At reset00000000
Access R/W R/W R/W R/W R/W R/W R/W R/W
bp Bit name Description
7BKD
Bank function control
0: Bank addressing is enabled.
1: Bank addressing is disabled.
6MIE
Maskable interrupt enable control
0: Disable
1: Enable
5-4 IM1-0
Interrupt mask level
Controls accept level of maskable interrupt.
3VF
Overflow detection
0: Not detected
1: Detected
2NF
Negative detection
0: Not detected
1: Detected
1CF
Carry detection
0: Not detected
1: Detected
0ZF
Zero detection
0: Not detected
1: Detected