Panasonic MN101L Series

Chapter 13
Serial Interface
XIII - 2 Overview
13.1 Overview
The LSI has 4 serial interfaces (SCIF0/SCIF1/SCIF2/SCIF3), which support the following types of communica-
tion.
Table:13.1.1 Serial Interface Communication Types
Table:13.1.2 shows pins used for each SCIF. Each SCIF has two pin groups, Group-A and Group-B.
In this chapter, the suffix of "A" and "B" is omitted to describe functions of SCIF.
Table:13.1.2 Serial Interface Pins
..
The combination of pins of Group-A and Group-B must not be used.
For example, in SCIF0 Clock-Synchronous communication, the pin combination of SBO0A
(Group-A), SBI0A (Group-A), and SBT0B (Group-B) is not be allowed.
..
SCIF0, SCIF1 SCIF2, SCIF3
Clock-Synchronous √√
UART(Full duplex) √ -
Multi master IIC - √
SCIF0 SCIF1 SCIF2 SCIF3
Pin group ABABABAB
Clock synchronous
Data I/O pin
SBO0A
(P65)
SBO0B
(P36)
SBO1A
(P30)
SBO1B
(P46)
SBO2A
(P42)
SBO2B
(P23)
SBO3A
(P04)
SBO3B
(P52)
Data input pin
SBI0A
(P64)
SBI0B
(P35)
SBI1A
(P26)
SBI1B
(P45)
SBI2A
(P41)
SBI2B
(P22)
SBI3A
(P06)
SBI3B
(P51)
Clock I/O pin
SBT0A
(P66)
SBT0B
(P37)
SBT1A
(P31)
SBT1B
(P47)
SBT2A
(P43)
SBT2B
(P24)
SBT3A
(P05)
SBT3B
(P53)
Chip select I/O pin
SBCS0A
(P67)
SBCS0B
(P40)
SBCS1A
(P32)
SBCS1B
(P50)
SBCS2A
(P44)
SBCS2B
(P25)
SBCS3A
(P07)
SBCS3B
(P54)
Full duplex UART
Data I/O pin
TXD0A
(P65)
TXD0B
(P36)
TXD1A
(P30)
TXD1B
(P46)
----
Data input pin
RXD0A
(P64)
RXD0B
(P35)
RXD1A
(P26)
RXD1B
(P45)
----
Multi master IIC
Data I/O pin ----
SDA2A
(P42)
SDA2B
(P23)
SDA3A
(P04)
SDA3B
(P52)
Clock I/O pin ----
SCL2A
(P43)
SCL2B
(P24)
SCL3A
(P05)
SCL3B
(P53)