Panasonic MN101L Series

Chapter 8
8-bit Timer
VIII - 24 8-bit Timer Pulse Output
8.5.2 Setup Example
 Timer Pulse Output Setup Example
Here is an example that a 50 kHz pulse is output from TM0IO pin of Timer 0. In order to output a 50 kHz pulse,
select SYSCLK/2 for clock source, and set 1/2 cycle (100 kHz) in the Timer 0 compare register (at f
sysclk
= 10
MHz).
The setup procedure and the description of each step are shown below.
..
If any data are written to TMnOC while TMnBC is stopped, the timer output turns to "Low".
..
Step Setting Register Description
1 Disable the timer counter TM0MD.TM0EN = 0 Disable the timer count operation.
2 Select the timer output pin TMIOEN0.TM0OEN = 1 Select the timer output pin.
[Chapter 7 I/O Port]
3 P0DIR.P0DIR5 = 1
4
Set the timer mode register TM0MD.TM0PWM = 0
TM0MD.TM0MOD = 0
Select the timer normal operation.
5 TM0MD.TM0CK1-0 = 01 Select the prescaler as the clock source.
6
Set the prescaler CK0MD.TM0PSC1-0 = X0
CK0MD.TM0BAS = 1
Select SYSCLK/2.
7
Set the output cycle TM0OC = 0x31 Set the timer output cycle.
Setup value: 49 (0x31)
8 Enable the timer counter TM0MD.TM0EN = 1 Enable the timer count operation.