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Panasonic MN101L Series

Panasonic MN101L Series
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Chapter 4
Clock/ Mode/ Voltage Control
Mode Control Function IV - 23
4.2.4 Note for Transition to STANDBY Mode
While PSW.MIE is set to "1", if it can’t be guaranteed that an interrupt for wakeup re-occurs after the transition to
STANBY mode since a maskable interrupt for wakeup has occurred before the transition to STANBY mode by
setting the CPUM register, CPU can not wake up from STANDBY mode.
Figure:4.2.13 shows the example that CPU can not wake up from STANDBY mode.
Therefore, it is necessary to prevent CPU from accepting a maskable interrupt for wakeup before the transition to
STANDBY mode.
To disable a maskable interrupt, set PSW.MIE to "0" before a maskable interrupt for wakeup occurs.
In addition, while CPUM.STOP or CPUM.HALT is set to "1", CPU returns to CPU operating mode by a
maskable interrupt for wakeup regardless of the value of PSW.MIE.
(The value of xICR.LV1-0 for an interrupt as a return factor needs to be smaller than the value of PSW.MIE.)
In this way, even if a maskable interrupt for wakeup occurs before the transition to STANDBY mode, CPU can
return to CPU operating mode by a maskable interrupt for wakeup since the interrupt is detected after the transi-
tion to STANDBY mode.
However, the interrupt processing is not executed because CPU just returns to CPU operating mode in this func-
tion. To execute the interrupt processing, it is necessary to set PSW.MIE to "1" after returning to CPU operating
mode.
Figure:4.2.14 shows the operation in STANDBY mode and the acceptance sequence of interrupt while an inter-
rupt is disabled.
When not executing the interrupt processing, it is necessary to set xICR.IR to "0" by software.
Figure:4.2.15 shows the operation in STANDBY mode and the non-acceptance sequence of interrupt while an
interrupt is disabled.
Figure:4.2.13 Example of Not Returning to CPU Operating Mode
NORMAL/SLOW
mode
Enable maskable interrupts
Enable interrupt which
triggers return
)
(
HALT/STOP
mode
Set HALT/STOP
mode
Interrupt service routine
Set xICR.IE as the return factor.
RTI
Set PSW.MIE to "1".
Watchdog timer
HLAT0/1/2/3 : conticue counting
STOP : stop counting
R
eturn factor interrupt occured
CPU can't return the CPU operating mode,
because interrupt as the return factor is not occured again.

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