EasyManua.ls Logo

Panasonic MN101L Series

Panasonic MN101L Series
563 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
Chapter 4
Clock/ Mode/ Voltage Control
IV - 12 Clock Control
4.1.2 Change of the External Low-speed Oscillation Capability
The external low-speed oscillation starts with high-current driving capability at LSI power-on. After the oscilla-
tion stabilization, the LSI changes the oscillation to low-current driving capability for the low power consump-
tion.
If the current driving capability of oscillation is not enough, it can be changed by the rewriting enable register
(FBEWER: 0x03D80) and the clock mode control register (CLKMD: 0x03D8C).
To change the current driving capability, set the registers in operation with the internal low-speed oscillation.
Figure:4.1.2 Change of the External Low-speed Oscillation Capability
//Set the Rewriting Enable Register
FBEWER = 5A
//Set the Rewriting Enable Register
FBEWER = 00
//Set the Clock mode Control Register
CLKMD.bit6-4 = 010
SLOW mode
(SYSCLK = SRCCLK)
Changed the Current Driving Capability
of External Slow-speed Oscillation

Table of Contents

Related product manuals