Chapter 3
Interrupts
III - 4 Overview
3.1.2 Operation
Interrupt Processing Sequence
Figure:3.1.2 shows the flow of a interrupt processing. When an interrupt occurs and is accepted, the Program
Counter (PC), Processor Status Word (PSW) and Handy Address (HA) are saved onto the stack by hardware, and
CPU jumps to the address specified by the corresponding interrupt vector. At the end of interrupt handler, execute
the "RTI" instruction to go back to the main program which had been executed before the interrupt was accepted.
Figure:3.1.2 Interrupt Processing Sequence
..
xICR.IR of maskable interrupt is cleared to "0" by hardware when the corresponding interrupt
is accepted, but NMICR.IRQNPG, NMICR.IRQNWDG, PERI0DT.PERI0DT6-0 and
PERI1DT.PERI1DT 4-0 are not cleared to "0" by hardware and must be cleared by software.
..
Start Interrupt handle
Hardware processing
Save PC, PSW, HA
Restore PC, PSW, HA
Transition Time: 6 SYSCLK cycles at least
nterrupt
ccurs
Main program
Restart
Execute RTI instructio
Transition Time: 6 SYSCLK cycles at least
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