Chapter 11
RTC Time Base Timer (RTC-TBT)
XI - 10 RTC-TBT Operation
11.3.2 Operation Setting Example
Interrupt of RTC-TBT
128-Hz periodic interrupt by RTC-TBT is generated.
The setup procedure and the description of each step are shown below.
Step Setting Symbol Description
1 Disable all maskable interrupts PSW * Set the MIE bit to "0".
2
Set the interrupt level PERI0ICR * Set the PERI0LV1-0 bits to "00".
Clear the corresponding interrupt request bit of
PERI0DT register, if it may have already been set.
Refer to [Chapter 3 3.1.3 Maskable Interrupt Control
Register Setup].
3
Set output of RTC-TBT interrupt TBTCNT0 Set the TBTIRQSEL2-0 bits of TBTCNT0 register to
"000".
4
Enable output of RTC-TBT
interrupt
TBTCNT0 Set the TBTIRQEN bit of TBTCN0 register to "1".
5 Enable RTC-TBT interrupt PERI0EN * Set the PERI0EN3 bit to "1".
6 Enable the maskable interrupt PSW * Set the MIE bit to "1".
* For PERI0ICR and PERI0EN, refer to [Chapter 3 Interrupts].
For PSW, refer to [Chapter 2 CPU].
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