Panasonic MN101L Series

Chapter 8
8-bit Timer
VIII - 8 8-bit Timer Control Registers
8.2.2 Programmable Timer Registers
The programmable timer register consists of timer n compare register (TMnOC) and timer n binary counter
(TMnBC).
 Timer n Compare Register
(TM0OC: 0x03F72, TM1OC: 0x03F73, TM2OC: 0x03F82, TM3OC: 0x03F83, TM4OC: 0x03F92,
TM5OC: 0x03F93)
Timer n compare register is an 8-bit register which stores a value compared with timer n binary counter.
..
When setting the compare register in cascade connection, pair of registers (TM1OC and
TM0OC, TM3OC and TM2OC, TM5OC and TM4OC) must be accessed simultaneously with
16-bit access instruction, MOVW.
..
 Timer n Binary Counter
(TM0BC: 0x03F70, TM1BC: 0x03F71, TM2BC: 0x03F80, TM3BC: 0x03F81, TM4BC: 0x03F90,
TM5BC: 0x03F91)
Timer n binary counter is an 8-bit up counter. If any data are written to the timer n compare register while the
counter is stopped, the timer n binary counter is cleared to 0x00.
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When reading the value of TMnBC register in cascade connection, pair of registers (TM1BC
and TM0BC, TM3BC and TM2BC, TM5BC and TM4BC) must be accessed simultaneously
with 16-bit access instruction, MOVW.
..
..
When reading the value of TMnBC register while operating, indeterminate data while count-
ing up may be read. Alternatively, the register must be read multiple times, and those data
confirmed to be the same.
..
bp76543 210
Bit name TMnOC7-0
At reset X X X X X X X X
Access R/W R/W R/W R/W R/W R/W R/W R/W
bp76543 210
Bit name TMnBC7-0
At reset00000 000
Access R R R R R R R R