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Panasonic MN101L Series

Panasonic MN101L Series
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Chapter 9
16-bit Timer
IX - 28 16-bit Event Count
9.4.2 Setup Example
Event Count Setup Example
Here is an example that, using timer 7, detecting the falling edge of the TM7IOA input 5 times generates the first
interrupt only, and subsequent interrupts are generated every 4 detections.
The setup procedure and its description are shown below.
Step Setting Register Description
1 Disable the timer counter TM7MD1.TM7EN = 0 Disable the timer count operation.
2 Disable the interrupt TM7ICR.TM7IE = 0 Disable the timer interrupt.
3 Select the event input TMIOSEL1.TM7IOSEL1-0 = 00 Select the event clock input pin.
[Chapter 7 I/O Port]
4 P0DIR.P0DIR4 = 0
5
Set the timer mode register TM7MD1.TM7CK1-0 = 01
TM7MD1.TM7PS1-0 = 00
Select SYSCLK as the clock source.
6 Set the interrupt cycle TM7PR1 = 0x0003 Set the interrupt generation cycle.
7 Set the timer mode register TM7MD2.TM7BCR = 1 Select the TM7BC clear source.
8
TM7MD1.TM7CK1-0 = 10
TM7MD1.TM7PS1-0 = 00
Select TM7IO input as the count clock source.
9 Set the interrupt level TM7ICR.TM7LV1-0 Refer to [3.1.3 Maskable Interrupt Control Register Setup].
10 Enable the interrupt TM7ICR.TM7IE = 1
11 Enable the timer counter TM7MD1.TM7EN = 1 Enable the timer count operation.

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