Chapter 2
CPU
II - 20 Extended Calculation Instruction
2.4 Extended Calculation Instruction
2.4.1 About Extended Calculation Instruction
About this Table
Figure:2.4.1 About this Table
Signs
+ : Addition
- : Subtraction
* : Multiplication
/ : Division
→ : Substitution
... : Remainder
{DW1, DW0} : 32 bit data ( high 16 bits in DW1 register and low 16 bits in DW0 register are stored )
Bit Changes
Operation
VF NF CF ZF
Size, Cycles, Codes
Size, Cycles, Codes
Instruction format
Changes of VF/NF/CF/ZF of PSW
Operation descrition
Caution
Size, Cycles,
Codes(the shortest
are shows by using
this order format)
with change
with no change
in always 0
in always 1
-
0
1
Read with caution
in order to operate
program normally