Panasonic MN101L Series

Chapter 2
CPU
Overview II - 7
2.1.7 Address Space
Figure:2.1.5 shows the address space in CPU.
The CPU has 12 KB of RAM area (Max.) and 112 KB of ROM area (Max.).
This LSI has 4 KB of RAM and 64 KB of ROM.
The instruction access can be used as linear address space except Special function register space. The data access
needs bank specification in every 64 KB. (The initial value is first 64 KB space (0x00000 to 0x0FFFF)).
The data area consists of an area of 256 bytes (beginning at "0x00000") that supports efficient accesses with RAM
short addressing and an special function area of 256 bytes (beginning at "0x03F00") that supports efficient
accesses with I/O short addressing.
Figure:2.1.5 Address Space
0x040C0
0x04080
0x04000
0x00100
0x01000
0x00000
0x04100
0x04900
128 B
64 B
64 KB
B
ANK1
B
ANK0
16 KB
48 KB
0x10000
0x1FFFF
0x03000
256 B
256 B
0x03F00
4 KB
0x13FFF
Interrupt
vector table
Subroutine
vector table
RAM short addressing area
Internal ROM(64 KB
)
Internal RAM(4 KB)
Special function register area
Data
Data
Instruction code/
Table data
I/O short addressing area
Instruction code