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Panasonic MN101L Series

Panasonic MN101L Series
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Chapter 8
8-bit Timer
8-bit PWM Output VIII - 25
8.6 8-bit PWM Output
8.6.1 Operation (Timer 0, Timer 2 and Timer 4)
8-bit PWM Output Operation
Timer 0, Timer 2 and Timer 4 have PWM function. a PWM waveform with a given duty cycle is generated by set-
ting TMnOC to "High" period of the PWM duty. And the period of the PWM is the time of the full count overflow
of the 8-bit timer.
For PWM output pins, refer to Table:8.1.1.
Count Timing of PWM Output (at Normal)
Figure:8.6.1 Count Timing of PWM Output (at Normal)
When TMnPOP bit is "0":
(A) PWM output is "High" while TMnBC counts up from "0x01" to the setting value of TMnOC.
(B) PWM output changes to "Low" when TMnBC matches the setting value of TMnOC, then TMnBC contin-
ues counting up until it overflows.
..
As for the initial setting, the PWM output is changed from "Low" to "High" when setting the
TMnMD.TMnPWM (when TMnPOP bit = 0) to select the PWM operation.
..
N
N+1 N+2 FE
FF
Count
clock
TMnEN
bit
Compare
register
Binary
counter
Interrupt
request
00 01 N+1N-1
N
00 01 N-1
N
TMnIO output
(PWM output)
(A)
(B)
PWM basic waveform (overflow time of binary counter)
Time set in the compare register

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