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Panasonic MN101L Series

Panasonic MN101L Series
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Chapter 5
Watchdog Timer (WDT)
Operation V - 5
5.3.2 Setup Example
The following procedure shows the example of WDT operation. SRCCLK is selected as WDCLK, and the error
time period is 2
18
× (1/f
WDTCLK
).
Setup Example
Setup Example
Setup Example
* Refer to [Chapter 3 Interrupts] about NMICR.
Step Setup Procedure Register Description
1
Set the error detection period WDCTR Set the WDCKSEL to "0".
Set the WDTS2-0 to "111".
2 Activate WDT WDCTR Set the WDEN to "1".
Step Setup Procedure Register Description
1 Clear WDT-Counter WDCTR Clear WDT-counter before it overflows.
Step Setup Procedure Register Description
1
Handling interrupt NMICR* WDIRQ is generated when WDT-Counter overflows.
Check that NMICR.IRQNWDG is set to "1", and take appropri-
ate measures to make the LSI operate normally again.

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