Panasonic MN101L Series

Chapter 9
16-bit Timer
IX - 32 16-bit Standard PWM Output (with Continuously Variable Duty)
 State at PWM Output Disabled and Polarity (Timer 8)
The TM8MD3.TM8PWMF can control the TM8IO output waveform at PWM output disabled. The polarity of
PWM output can be selected with the TM8MD3.TM8PWMO.
 Count Timing of Standard PWM Output (when compare register 1 is set to "0x0000")
Figure:9.6.2 Count Timing of Standard PWM Output (when compare register 1 is set to "0x0000")
The PWM output is "High", while the counter is stopped by setting TMnMD1.TMnEN to "0".
0000
N+1 N+2 FFFE
FFFF
Count
clock
TMnEN
bit
Compare
register 1
Binary
counter
TMnIO output
(PWM output)
0000 0001 N+1N-1
N
0000 0001 N-1
N