Panasonic MN101L Series

Chapter 3
Interrupts
Control Registers III - 31
Figure:3.2.2 Block diagram of Group-1 interrupt
EN0
EN1
EN2
EN3
EN4
PERI1EN
PERI1DT.DT0
0
4
LVD interrupt
A/D interrupt
DMA interrupt
D
MA-Addreq interrupt
DMA-Error interrupt
Group
Interrupt
1
When the interrupt factor and
set/clear by software ocurred at the same time,
set/clear by software is given priority.
edge
detection
edge
detection
edge
detection
edge
detection
edge
detection
PERI1DT.DT1
PERI1DT.DT2
PERI1DT.DT3
PERI1DT.DT4