Panasonic MN101L Series

<Contents - 2>
2.3.1 Overview............................................................................................................................ II-17
2.3.2 Extended Calculation Control Register ............................................................................. II-18
2.4 Extended Calculation Instruction..................................................................................................... II-20
2.4.1 About Extended Calculation Instruction............................................................................ II-20
2.4.2 MULWU 16-bit x 16-bit multiplication (unsigned) .......................................................... II-21
2.4.3 MULW 16-bit x 16-bit multiplication (signed)................................................................. II-22
2.4.4 DIVWU 32-bit / 16-bit division (unsigned) ...................................................................... II-23
2.4.5 BCDADD BCD addition (without carry).......................................................................... II-24
2.4.6 BCDADDC BCD addition (with carry)............................................................................. II-25
2.4.7 BCDSUB BCD subtraction (without carry) ...................................................................... II-26
2.4.8 BCDSUBC BCD subtraction (with carry)......................................................................... II-27
2.5 Reset................................................................................................................................................. II-28
2.5.1 Reset function .................................................................................................................... II-28
2.5.2 Reset sequence................................................................................................................... II-29
2.5.3 Oscillation Stabilization Wait Time .................................................................................. II-30
Chapter 3 Interrupts.............................................................................................................. III-1
3.1 Overview........................................................................................................................................... III-2
3.1.1 Block Diagram.................................................................................................................... III-3
3.1.2 Operation ............................................................................................................................ III-4
3.1.3 Maskable Interrupt Control Register Setup ...................................................................... III-15
3.1.4 Group Interrupt Control Register Setup............................................................................ III-17
3.2 Control Registers............................................................................................................................. III-20
3.2.1 Non-maskable Interrupt (NMI) Control Register............................................................. III-22
3.2.2 External Interrupt Control Register .................................................................................. III-23
3.2.3 Peripheral Group Interrupt Control Register .................................................................... III-24
3.2.4 Other Interrupt Control Register....................................................................................... III-29
3.2.5 Block diagram of Peripheral function group interrupt...................................................... III-30
3.3 External Interrupts........................................................................................................................... III-32
3.3.1 External Interrupt Control Registers................................................................................. III-33
3.3.2 Rising (Falling) edge triggered interrupt .......................................................................... III-45
3.3.3 Both edges triggered Interrupt.......................................................................................... III-46
3.3.4 Key Interrupt..................................................................................................................... III-47
3.3.5 Noise Filter Function ........................................................................................................ III-47
Chapter 4 Clock/ Mode/ Voltage Control ............................................................................ IV-1
4.1 Clock Control.................................................................................................................................... IV-2
4.1.1 Control Registers ................................................................................................................ IV-3
4.1.2 Change of the External Low-speed Oscillation Capability .............................................. IV-12
4.2 Mode Control Function................................................................................................................... IV-13