Chapter 4
Clock/ Mode/ Voltage Control
IV - 32 Mode/Voltage/Clock Transition
Table:4.4.1 Mode/Voltage/Clock Transition
Destination mode
NORMAL_18_HCLK_SCLK
NORMAL_18_HCLK
NORMAL_13_HRC_SCLK
NORMAL_13_HRC
SLOW_18_SCLK
SLOW_13_SCLK
SLOW_11_SCLK
HALT0_18_HCLK_SCLK
HALT0_18_HCLK
HALT0_13_HRC_SCLK
HALT0_13_HRC
HALT1_18_SCLK
HALT1_13_SCLK
HALT1_11_SCLK
HALT2_18_SCLK
HALT2_13_SCLK
HALT2_11_SCLK_DEEP
HALT3_18_SCLK
HALT3_13_SCLK
HALT3_11_SCLK
STOP0_18
STOP0_13
STOP0_11_DEEP
STOP1_18
STOP1_13
STOP1_11
IDLE_18_SCLK_HCLK
IDEL_13_SCLK_HRC
Source mode
RESET
M
*1
NORMAL_18_HCLK_SCLK
MMMMMMM
V
MMM
V
M
NORMAL_18_HCLK
M M
*2
MM M
*2
M
*2
M
*2
MM
NORMAL_13_HRC_SCLK
MM MMM MM
V
MMM
V
M
NORMAL_13_HRC
M M
*2
MM M
*2
M
*2
M
*2
MM
SLOW_18_SCLK
M
*3
M
*3
V M
*3
M
*3
MMMMMM
*4
SLOW_13_SCLK
M
*3
M
*3
V M
*3
M
*3
MMMMMM
*4
SLOW_11_SCLK V V MMM
HALT0_18_HCLK_SCLK M
HALT0_18_HCLK M
HALT0_13_HRC_SCLK M
HALT0_13_HRC M
HALT1_18_SCLK M
HALT1_13_SCLK M
HALT1_11_SCLK M
HALT2_18_SCLK
M
*3
HALT2_13_SCLK
M
*3
HALT2_11_SCLK_DEEP
M
V
*5
M
V
*6
HALT3_18_SCLK M
HALT3_13_SCLK M
HALT3_11_SCLK M
STOP0_18
M
*3
M
*3
STOP0_13
M
*3
M
*3
STOP0_11_DEEP
M
V
*5
M
V
*6
STOP1_18
M
*2
STOP1_13
M
*2
STOP1_11
M
*2
IDLE_18_SCLK_HCLK M M
IDEL_13_SCLK_HRC M M
M Operation mode change
V VDD18 voltage change
Oscillation stabilization wait process
*1
Reset+Power supply voltage activation (6 ms) + SRC oscillation stabilization (2
11
/ (f
SRC
/2))
*2 SCLK oscillation stabilization (DLYCTR.DLY3-0)
*3 HCLK oscillation stabilization (DLYCTR.DLY3-0)
*4 Ensure adequate time for HCLK oscillation stabilization by program
*5 VDD18 voltage change time (PWCTR1.PWUPTM2-0: 500 µs or more) + HCLK oscillation stabilization (DLYCTR.DLY3-0)
*6 VDD18 voltage change time (PWCTR1.PWUPTM2-0: 4 ms or more) + HCLK oscillation stabilization (DLYCTR.DLY3-0)